Time-interleaved analog-to-digital converter arrangements (referred to as: time interleaved analog-digital converters, time-interleaved ADCs) constitute one possibility for converting analog values into digital values. In this case, a plurality of analog-to-digital converters are clocked in a time-interleaved manner, such that it is possible to digitize the analog signal at a multiple of the sampling rate of the individual analog-to-digital converters. For this purpose, the different analog-to-digital converters have to operate with a fixed temporal relationship, in particular at intervals distributed uniformly over a clock period, in order to ensure an optimum interaction of the analog-to-digital converters. Undesired time skews between individual analog-to-digital converters are referred to as a time skew error.
One conventional procedure for eliminating such time skew errors consists in performing a digital calibration of time skews. For this purpose, a known calibration signal is fed to the analog-to-digital converter arrangement, and an adaptive digital filter utilizes an output signal of the analog-to-digital converter arrangement to compensate for the time error, wherein the setting of the filter is performed on the basis of a comparison of calibration signal and output signal. This can mean a high complexity and it can thus take a long time until a calibration is concluded.
Another conventional procedure may be based on parallel operation of pairs of analog-to-digital converters using a rapidly changing input signal. In the case of operation without a time skew error, the output values of the analog-to-digital converters operated in parallel are identical. Disadvantages may consist in the fact that the operating mode for the calibration may differ from the normal conversion operating mode during the analog-to-digital conversion of useful signals and, on account of different loads at assemblies, the resulting calibration may differ from an optimum calibration in a normal conversion operating mode.
A further conventional method may consist in modifying the order of the sampling by the analog-to-digital converters by means of an algorithm. The selection of the order may be random or carried out according to other criteria. However, this may result in an increased area requirement of the circuit and a higher power consumption. A further effect may consist in the fact that the time skew error is not completely eliminated in some cases.